This invention generally relates to aligning a wafer to a photolithographic system before exposing a pattern on the wafer. More particularly it relates to a method of achieving improved alignment between the wafer and the system.
Integrated circuit chips are fabricated one level at a time. The levels include diffusions, gates, metal lines, insulation, isolation, and contacts. The structures on these levels must be precisely positioned so that the finished chip has structures properly positioned. The step of positioning a level with respect to previously formed level is called alignment. While some structures are automatically aligned or self-aligned to previously formed structures, many others must be aligned using optical techniques on a photolithography tool. These optical alignment techniques introduce error from one level to the next. To the extent this error can be reduced the performance and yield of integrated chips can be improved.
Numerous methods for alignment have been developed and are in use. Each of these methods has advantages and disadvantages depending on factors such as film thickness, material characteristics, and other processing conditions. But no single method works best for all processing conditions. Thus, a better solution for alignment is needed that provides superior alignment under a variety of conditions, and this solution is provided by the following invention.
It is therefore an object of the present invention to provide a way to reduce misalignment before exposing a wafer in a photolithography tool.
It is a further object of the present invention to take advantage of all of the various alignment techniques available on the photolithography tool and all the alignment targets on the wafer and dynamically choose the ones that gives the best alignment results.
It is a feature of the present invention that several alignment schemes are used and the one providing the least error is selected.
It is a feature of the present invention that several alignment systems are used, data is collected for each, error is measured, and the system providing the least residual error is selected.
It is an advantage of the present invention that the system providing the least residual error is selected.
It is an advantage of the present invention that the wafer is most accurately aligned to the photolithographic system.
These and other objects, features, and advantages of the invention are accomplished by a method of aligning a substrate to an exposure system comprising the step of providing a substrate on a stage of an exposure system. The exposure system includes an alignment component. The method further comprises gathering alignment data for the plurality of alignment components. The method further comprises calculating an alignment-related parameter from the alignment data for each alignment component wherein the alignment-related parameter for each component includes indication of alignment component quality. The alignment related parameter is used to select an alignment component for use in aligning the substrate. The substrate remains on the stage during these steps.